1. Field of the Invention
The present invention relates to an analysis method for semiconductor large scale integrated (LSI) circuit electrostatic discharge and a program for the same.
2. Description of the Related Art
A shortest path determination method or a convex minimum cost maximum flow analysis has been carried out for a network of protective elements and parasitic resistances extracted from a layout of a semiconductor LSI circuit, in order to analyze semiconductor LSI circuit electrostatic discharge (ESD). Inter-pad voltages and current paths are calculated when electrostatic discharge is applied between pads of semiconductor LSI circuit.